1. Field of the Invention
The present invention relates to a semiconductor module and, particularly, to a semiconductor module including switching devices as components of an inverter which is used in an uninterruptable constant-voltage constant-frequency (CVCF) power unit.
2. Description of the Prior Art
FIG. 1 is a block diagram showing the conventional semiconductor module and its associated switching control circuit taking charge of one phase of an inverter. In the figure, a PWM control circuit 1 has its output connected to a short-circuit prevention circuit 2, which provides outputs to drive circuits 3a and 3b. The drive circuits 3a and 3b supply their outputs to a semiconductor module 4 which incorporates two serial-connected self-turn-off switching devices, such as transistors and GTOs, Q1 and Q2.
FIG. 2 is a timing chart showing the input/output signals among the component blocks shown in FIG. 1. The chart includes the output signal S1.sub.A of the PWM control circuit 1, the drive signal S1.sub.B provided by the positive drive circuit 3a for the positive switching device Q1, the drive signal S1.sub.C provided by the negative drive circuit 3b for the negative switching device Q2, and the output signal S1.sub.D produced by the semiconductor module 4.
Next, the operation of the above-mentioned prior art system will be described. The PWM control circuit 1 determines the timing of activating or deactivating the switching devices Q1 and Q2 which constitute a phase arm of the inverter, and produces the output signal S1.sub.A. A high output signal S1.sub.A operates on the drive circuit 3a to produce the drive signal S1.sub.B by which the positive switching device Q1 turns on, while the negative switching device Q2 does not receive its drive signal S1.sub.C from the drive circuit 3b and stays in the off state. Conversely, a low output signal S1.sub.A does not provide the drive signal S1.sub.A for the positive switching device Q1, causing it to stay in the off state, while the negative switching device Q2 receives the drive signal S1.sub.C from the drive circuit 3b and turns on.
In the transition of the output signal S1.sub.A from high to low, or from low to high, namely when one switching device changes the state from on to off and another switching device from off to on, the main current in the turning-off switching device Q1 or Q2 goes off with a time lag of a carrier storage time plus a turn-off time with respect to the turn-off command by the drive signal S1.sub.B or S1.sub.C, resulting in an improper operating mode where both switching devices Q1 and Q2 are in the on state simultaneously (this state is termed here "vertical short-circuit").
In order to prevent the occurrence of vertical short-circuit, a short-circuit preventing circuit 2 is provided, and it causes the turning-on drive signal S1.sub.B or S1.sub.C to lag so that both switching devices Q1 and Q2 are given the off-command for a certain time length `t`. However, when the pulse width is narrow, as in the high-frequency PWM control, a time lag in the turn-on command causes the semiconductor module 4 to produce the output S1.sub.D which is different in pulse width from the PWM control signal S1.sub.A, and a theoretical output waveform which is free of specific harmonics cannot be accomplished.